The present invention relates to the field of generating images and data which are eventually displayed. More specifically, the present invention relates to the field of graphics pipelines.
Computers are useful functional devices which are fabricated in a variety of sizes ranging from computers which occupy large office space down to computers which are held in one""s hand. These varying sizes of computers also perform an extremely wide variety of useful operations, depending on the software which is installed within their particular memory storage device. For instance, computers can manage numerous financial transactions of a bank, control the fabrication of items ranging from automobiles down to integrated circuit chips, store addresses and telephone numbers of acquaintances, enable someone to produce and edit documents, along with transmitting and receiving data. It is appreciated that part of the process of providing many useful operations, computers typically utilize some type of display device (e.g., a cathode ray tube, a liquid crystal display, and the like) in order to display images and data which are recognizable to their users. As such, computers typically incorporate functionality for generating images and data which are subsequently output to the display device.
One typical prior art technique for generating computer images and viewable data within a computer system is to utilize a graphics pipeline, which includes several different stages of functionality. Basically, the typical prior art graphics pipeline of a computer system enables different graphics data to be processed in parallel, thereby generating graphics images at a faster rate and also utilizing the resources of the computer system more efficiently.
Specifically, sets of graphics primitives are specified within the computer system and are subsequently sent down the graphics pipeline. Within the typical graphics pipeline, there are different functional blocks of circuitry. Each functional block of the typical graphics pipeline sequentially performs a different function or functions on the received graphics primitives and then passes that data onto the following functional block. Eventually, the graphics pipeline manipulates the graphics primitives in order to produce the final pixel values of an image. As such, the typical graphics pipeline is used to produce final pixel values of an image in a manner which is analogous to the way an assembly line process is used to eventually manufacture an automobile. It should be appreciated that the functionality of a typical prior art graphics pipeline is well known by those of ordinary skill in the art. It should be further appreciated that there are disadvantages associated with a typical prior art graphics pipeline.
One of the disadvantages associated with a typical prior art graphics pipeline is that it is not efficient during its operation. For instance, during operation the typical prior art graphics pipeline can recalculate particular vertex data corresponding to a specific vertex multiple times. Specifically, since a vertex can be used for more than one primitive, the typical prior art graphics pipeline often recalculates particular vertex data multiple times for the same vertex with respect to independent primitives, polygonal meshes, and connected primitives. Therefore, the typical prior art graphics pipeline does not operate efficiently.
Accordingly, a need exists for a method and system for providing increased operational efficiency to a graphics pipeline which is functioning in conjunction with a computer system.
The present invention provides a method and system for providing increased operational efficiency to a graphics pipeline which is functioning in conjunction with a computer system. The basic idea of one embodiment in accordance with the present invention is to utilize a graphics geometry cache together with a graphics pipeline. The graphics geometry cache is a relatively small cache (e.g., 128 entries) used for storing and maintaining vertex data. Specifically, the results of computations performed on vertices by the graphics pipeline (e.g., transformed vertices and attributes such as color) are cached within the graphics geometry cache. Furthermore, the cached entries are tagged by their corresponding vertex coordinates. Subsequently, when a particular vertex is specified for the graphics pipeline, a tag compare is executed through a hashing function to determine whether the graphics geometry data for that particular vertex is stored within the graphics geometry cache. If a hit occurs during the tag compare, a copy of the graphics geometry data is retrieved from the graphics geometry cache rather than having to recompute the graphics geometry data for that particular vertex. Therefore, one of the advantages of the graphics geometry cache of the present embodiment is that it saves computational resources.
Specifically, one embodiment of the present invention includes a method for improving performance of a graphics pipeline. The method includes the step of caching graphics data corresponding to a vertex shared by a plurality of primitives of a graphics image. Furthermore, the method also includes the step of retrieving the graphics data corresponding to the vertex to be utilized in a graphics pipeline.
In another embodiment, the present invention also includes a method for improving performance of a graphics pipeline. The method includes the step of caching graphics data corresponding to a vertex of a graphics image within a first memory device. Additionally, the method includes the step of caching the graphics data corresponding to the vertex within a second memory device. Moreover, the method includes the step of retrieving the graphics data corresponding to the vertex from the second memory device to be utilized in a graphics pipeline.
In still another embodiment, the present invention includes the steps of the above described embodiment and further includes the step of determining whether the graphics data corresponding to the vertex is cached within the first memory device.